Verilog questions

| Tuesday, August 25, 2009

../images/main/bullet_4dots_green.gif Why cannot initial statement be synthesizeable ?

../images/main/bullet_4dots_green.gif Consider a 2:1 mux; what will the output F be if the Select (sel) is "X" ?

../images/digital/mux2x1.gif

../images/main/bullet_4dots_green.gif What is the difference between blocking and nonblocking assignments ?

../images/main/bullet_4dots_green.gif What is the difference between wire and reg data type ?

../images/main/bullet_4dots_green.gif Write code for async reset D-Flip-Flop.

../images/main/bullet_4dots_green.gif Write code for 2:1 MUX using different coding methods.

../images/main/bullet_4dots_green.gif Write code for a parallel encoder and a priority encoder.

../images/main/bullet_4dots_green.gif What is the difference between === and == ?

../images/main/bullet_4dots_green.gif What is defparam used for ?

../images/main/bullet_4dots_green.gif What is the difference between unary and logical operators ?

../images/main/bullet_4dots_green.gif What is the difference between tasks and functions ?

../images/main/bullet_4dots_green.gif What is the difference between transport and inertial delays ?

../images/main/bullet_4dots_green.gif What is the difference between casex and case statements ?

../images/main/bullet_4dots_green.gif What is the difference between $monitor and $display ?

../images/main/bullet_4dots_green.gif What is the difference between compiled, interpreted, event based and cycle based simulators ?

../images/main/bullet_4dots_green.gif What is code coverage and what are the different types of code coverage that one does ?

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